..:::::..              .:::::::::::.             :::::::::::::::            :::::::::::::::::            :::::::_/|:::::::             ::::=/_/:::::::              `:_/ |::::::'           (   /  ,|:::''            \_/^\/||__         _/~  `""~`"` \_      __/  -'/  `-._ `\_\__    /jgs  /-'`  `\   \  \-.\ bruno.cardoso AT gmail +++ Academic resources PhD Thesis, Bruno Cardoso Lopes. Design and evaluation of compact ISAs B.C Lopes, L. Ecco, E.C. Xavier, R.J. Azevedo. Design and evaluation of compact ISA extensions. ELSEVIER Microprocessors and Microsystems Journal, 2016. B.C. Lopes, R. Auler, L. Ramos, E. Borin, R.J. Azevedo. SHRINK: reducing the ISA complexity via instruction recycling. Proceedings of the 42nd Annual International Symposium on Computer Architecture - ISCA 2015. B.C. Lopes, R. Auler, E. Borin, R.J. Azevedo. ISA Anti-Aging: Recycling Old Instructions and Reducing ISA Complexity. Intel Compiler, Architecture and Tools Conference - (CATC) 2013. B.C. Lopes, R. Auler, E. Borin, R.J. Azevedo. ISA Aging: A X86 case study. Seventh Annual Workshop on the Interaction amongst Virtualization, Operating Systems and Computer Architecture - WIVOSCA 2013. L. Ecco, B.C. Lopes. SPARC16: A New Compression Approach for the SPARC Architecture. Computer Architecture and High Performance Computing, Symposium on, 2009, ISSN 1550–6533.